基于阻尼因子补偿的LDO设计与实现-微电子学与固体电子学专业论文.docxVIP

摘要摘要 摘要 摘要 大规模集成电路的飞速发展促进了电子产品的蓬勃发展。作为电子设备运作 的核心——电源就面临了越来越大的挑战。LDO是新一代的集成电路稳压器，其 需求量大，成本低，价格便宜，广泛应用于产品的电源管理中。因此，对LDO进 行设计研究具有重要的学术价值和现实意义。 本文为高性能PLL的VCO设计了一个片上线性稳压器，用于大大降低低频电 源噪声对VCO特性的影响，其输入电压为3．3V，输出电压为3V，负载电流范围 为14mA---24mA。该LDO具有简单的外围电路(无需片外电容元件)，高的系统 效率，良好的温度特性，宽的电源工作范围，较好的电源噪声抑制能力和较强的 负载调整能力，同时能够在各种负载条件下稳定工作。整个PLL项目在Charter 0．351am CMOS工艺下设计完成。 文中首先分析了LDO的基本原理，给出了电路系统的性能参数。然后，根据 负载锁相环VCO的功能要求及性能指标构建了系统的整体框架，并制定了设计指 标。利用小信号分析方法对系统稳定性进行了分析，介绍了基于阻尼因子控制的 LDO系统稳定补偿方法。这种补偿方法使系统无需片外电容就能稳定工作，克服 了传统的等效串联电阻补偿的不精确以及嵌入式米勒补偿不适合驱动大的负载电 容等缺点。随后，在此理论基础上对内部的各个模块，如电压基准源、误差放大 电路和调整管等进行了具体的电路设计和分析，且达到了相应的设计指标，最后， 完成了整体电路和版图设计。 关键词；低压差稳压器阻尼因子补偿带隙基准运算放大器 AbstractAbstract Abstract Abstract With the development of very large scale integrated(vI_sI)，electronic products are well developed．As the core of electronic equipment,power management is facing with more challenge．LDO is the new generation regulator,which is one of the most popular power convcl。tel-S widely used in power management because of its low cost，cheap price，and great demand．Therefore it has huge academic and practical value to study LDO． This thesis presents a design of Low-Dropout Regulator(LDO)，which is used to highly reduce the influence of the low frequency power noise on the voltage control oscillator fvco)in a high performance phase locked loop fi LL)．The input voltage of the LDO is 3．3V,the output voltage of it is 3v,and the load current ranges from 14mA tO 24mA．Furthermore，the LDO has simple peripheral devices(capacitor-free of out-chip)，high system efficiency,good temperature coefficient,丽de power operating range，good power supply noise rejection and good load regulation．Meanwhile，it call operate stably in any case of load．The project of PLL has been implemented in Charter 0．35pm CMOS process． The thesis，fnst，analyses the basic principle of LDO linear regulator,and presents the electrical characteristics of the circuit system．And then，the general structure of the LDO linear voltage regulator is