三种基于具体芯片的数字串行io接口的分析-analysis of three kinds of digital serial io interfaces based on specific chips.docxVIP

摘要微电子技术是20世纪发展最为迅速的高新技术，传统的设计方法依靠电路图和手工连接的方式来设计电路，但是今天计算机语言已经被广泛应用来描述大规模集成电路。随着单片规模的变大，要求的输入输出(I/O)引脚数必将越来越多。本文结合西安电子科技大学CAD所的具体科研项目，旨在讨论三种不同的串行数字接口的结构、区别及应用。I2C总线是双向、两线、串行、多主控接口标准，具有总线仲裁机制，非常适合在器件之间进行近距离、非经常性的数据通信；UART总线是异步串口，比另外两种同步串口的结构要复杂很多，一般由波特率产生器、UART接收器和UART发送器组成，硬件上有两根线，一根用于发送，一根用于接收；SPI的通信原理很简单，占用端口较少，一般4根线就够基本通讯了，同时传输速度也很高。本文首先对同步有限状态机作了简单的介绍；结合一个小例子介绍有限状态机设计过程和注意事项。然后结合项目，分别对I2C总线、UART总线、SPI总线这三种串行总线接口进行了较为详尽的阐述，描述了各自总线的不同通信协议，探讨具体如何实现这些通信协议，并给出了模块示意图和状态图，用Verilog描述语言实现了模块描述，最后对所设计的微控制器在ModelSim软件环境下进行仿真验证，结果表明：所设计的I/O接口符合设计要求。关键词：接口串行有限状态机总线AbstractMicroelectronictechnologyisthefastestdevelopedhigh-techinthe20thcentury.Classicaldesignmethodsreliedonschematicsandmanualmethodstodesignacircuit，buttodaycomputer-basedlanguagesarewidelyusedtodesigncircuitofenormoussizeandcomplexity.Withthemonolithicscalebecomeslarger,therequiredI/Opinnumberwillbemoreandmore.BasedonscientificresearchprojectofthecomputeraideddesignCircuitinstituteofXI’DIANuniversity,thispaperisaimedtodiscussthreedifferentserialdigitalinterfaceoftheirstructure,distinction,application.ThebidirectionalI2Cbusconsistsoftheserialclockandserialdataline,supportingmulti-masterandbusarbitrationmechanism,idealfordevicesatcloserange,non-recurringdatacommunication.Universalasynchronousreceiverandtransmitterisasynchronousserialinterface,andmorecomplexthantheothertwosynchronousserialinterface，itgenerallyconsistsbybaudrategenerator,UARTreceiverUARTtransmitter,twolines,oneforsendingoneforreceiving.TheSPIcommunicationprincipleisverysimple,occupyfewerport,fourwireisenoughforbasiccommunication,atthesametimeisalsoinhightransmissionspeed。Thispaperfirstgivesabriefintroductionoffinitestatemachine;combinedwithasmallexample,introducesitsdesignprocessandPrecautions.ThenitgivesamoredetaileddescriptionofI2Cbus,UARTbusandSPIbusinterface.Thedifferentcommunicationprotocolsofeachbus,specificexplorationonhowtoachievethesecommunicationprotocols,sub-modulediagramsandstatediagrams.Thesesub-moduleswererealizedwithVerilogHDLlanguag