AGC的原理.pdfVIP

Chapter 4 Feedback Symbol Timing Synchronization Symbol timing recovery is as important as carrier recovery. Chapter 3 focused fully on carrier recovery, in this chapter, we introduce symbol timing detectors, and their utilization in a symbol timing feedback system. Figure 3-1 showed semi-analog semi- digital symbol timing alignment. This system involves the use of digital to analog converter (DAC) that is used to tune the crystal oscillator. The crystal oscillator is effected by manufacturing tolerance, environmental variations, and thus is less favored in modern wireless receivers that are produced with minimal RF circuits tuning and in high volumes. 1 Figure 4-1 shows a better implementation of symbol timing loop that is fully implemented in digital domain, where the clock that generates the sampling frequency of the A/D is freely running at the nominal sample rate of T N ±τ , N is the over sampling factor (number of samples per symbol), and ±τ is the symbol timing error which is given by 0 ≤τ ≤T . The correction of this timing error is carried out using digital resembling filter that resamples the matched filter output z (t) at the optimal symbol timing instance using mathematical interpolations, thus the matched filter becomes z (t ±τ) . The coming section will detail several symbol timing error detectors algorithms used in conjunction with the symbol timing loop illustrated in Figure 4-1. s(t) A/D Interpolator Matched s (kT )