[工学]数字逻辑复习.ppt

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2018-02-21 发布于浙江
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[工学]数字逻辑复习.ppt

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[工学]数字逻辑复习

数字逻辑：应用与设计复习大纲;课件下载网址： /~yingsancong;CHAPTER 1: Number Systems and Codes CHAPTER 2: Boolean Switching Algebra(布尔开关代数)基础知识（全部掌握）;1.3 Introduction to Number System;Number Systems – General;Number Systems (cont.);Binary Numbers--Base 2;Octal Numbers--Base 8;Hexadecimal Numbers--Base 16;1.3.2 Number System Conversion;Binary ? Octal;Binary ? Hex;1.3.2 Number System Conversion;1.3.2 Number System Conversion;1.3.2 Number System Conversion;1.3.3 Binary Codes;1.3.3 Binary Codes;Signed Number Representation ;Radix Complement Number Systems;Radix Complement Number Systems;Radix Complement Number Systems;Radix Complement Number Systems;Diminished Radix Complement Number systems;1.3.4 Binary Arithmetic Using Complement Codes;TO BE CONTINUED;CHAPTER 2: Boolean Switching Algebra(布尔开关代数);Three Primitive Logic Function--------AND;;;2.2 Switching Algebra Properties;2.3 Switching Algebra---Theorems;TO BE CONTINUED;CHAPTER 3: PRINCIPLES OF COMBINATIONAL LOGIC;3.1 DEFINITION OF COMBINATIONAL LOGIC;3.1.2 Deriving Switching Equations;3.2 Canonical(规范) Forms;Convert switching equation to SOP Eg： f1(a,b,c) = ∑ m(1,2,4,6), Convert switching equation to POS Eg： f1(a,b,c) = ∏ M(0,3,5,7), ;3.3 GENERATION OF SWITCHING EQUATIONS FROM TRUTH TABLES;Karnaugh Maps;Karnaugh Maps;Simplification using K-map2、3、4 varibles;;Systematic Procedure for Simplifying Boolean Functions;Minimization using Don’t Cares; POS Simplification;TO BE CONTINUED;CHAPTER 4 Analysis and Design of Combinational Logic (Sections 4.1 – 4.2);Analysis of Combinational Logic;Combinational Circuit Design;CHAPTER 4 Combinational Logic Design – Design Procedure, Encoders/Decoders (Sections 4.3 – 4.4);Decoders;2 to 4 Decoders;3-to-8 Decoder;3 to 8 Decoders (cont.);Implementing Boolean functions using decoders;Encoders;CHAPTER 4 Combinational Logic Design – Multiplexers (Sections 4.5);Multiplexer;4-to-1 MUX;8-to-1 MUX;Implementing Boolean functions with Multiplexers;TO BE CONTINUED;CHAPTER 5: Seque