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高速LVDS IO接口电路的全定制设计与实现
分类号UDC 工程硕士学位论文 高速LVDSI/O接口电路的全定制 设计与实现 硕士生姓名 宣建盘 学科领域 筮仕三焦 研究方向 Y!!!遮让 指导教师 珊座焦 熬拯 国防科学技术大学研究生院 二oo六年三月 国防科学技术大学研究生院工程硕士学位论文 ABSTRACT Wilh the rapid development oftlae teelmology ofsemiconductor and the computer,the frequency of伍e dock in tlae IC chips bccotnc¥higher and higher.I/O interfacecircuit has been one oftlao bottlenecks ofthe development ofvLSI design.Under thisbackground the need for high spccd data lt’ansmissioll iaereases quickly缸d LvDS(I ow Voltage Differential signal)conle¥up whiela is a kind of high speeds interface.LVDS is all international universal interface standard,However,this critical teelmologyis protected ia abroad and OUt cOUI螂still lack of OUg OWII IP co∞at present.So thispalm”focuses On study and design of a couple of driver and receiver according withIEEE 1596.3,whiela is ofgreat significance aad innovation and ofgreat malkct value. LVDS driver and rcecivcr belong to analog circuit domain,On th??? base oftheorystudy,the LVDS driver and receiver a∞deeply researehed.h the LⅦS driver elreuitdesign,a novel common mode feedback circuits is proposed for meeting the differentialmode output voltage compatible with LVD¥standards.弧e bias circuit with bandgapvoltage SOtn’ce¥11’ueture has a high stabifity.In the LVDS receiver circuit design,amulti-amplifier with pre-amplifier and maila hysteresis eomparator is adopted.Considering circuit’s reliability,a in..ehip static fail-safe circuit is also adopted.Thedesign structure ofeada cell circuit is analyzed. At last,the 1ayout of LVD¥driver and receiver is implemented in Virtuoso ofCadence by nleallS of full custom design.The main problems existed in design of theLⅦS driver and receiver layout design a坞diseusse正such船the match of MOStransistor,poly resistor and latch-up and SO OIL A11 circuits m simulated in I-Ispico andthe results demonstrate that the whole chip Call work at¥OOMI-Iz with goodperformance. This paper sets a foundation for flll’tht!l”study 011 high speed digital signal transmittechnology
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