第五章_AHDL.pptVIP

What is AHDL Altera Hardware Description Language develop by Altera integrate into the Altera software Max+Plus II description the hardware in language instead of graphic easy to modify easy to maintain very good for complex combinational logic BCD to 7 Segment converter address decoding state machine more than you want…….. continue... As easy as Graphic Entry As powerful as HDL (Hardware Description Language) VHDL, Verilog HDL etc. How to use the ADHL use any text editor to create the file Altera Software Max+Plus II provide text editor Create your AHDL file continue….. 例：设计两输入与非门 continue….. save your ADHL file as name.TDF continue... Error Location during Compilation Easy to locate the error AHDL with Graphic Use the File menu to create Symbol for the AHDL design The symbol can be used for graphic entry continue….. AHDL语言的规则及结构特点 continue….. continue….. AHDL语言的规则及结构特点 continue….. AHDL语言的规则及结构特点 continue….. 5.2.1 节点和数组的记法 节点和数组需要注意： 数组 VAR[N..0] 5.2.2 AHDL中的数字 5.3.1 逻辑运算符 5.3.2 算术运算符 5.3.2 关系运算符 5.3.4 运算符的优先级 例3 4位等值比较器的AHDL语言描述 SUBDESIGN eqcomp4 ( a[3..0],b[3..0] :input; equals :output; ) BEGIN equals=(a[]==b[]); END; 2-4译码器设计 SUBDESIGN decoder ( code[1..0]: INPUT; out[3..0]: OUTPUT; ) BEGING CASE code[ ] is WHEN 0 = out[ ]=B”0001”; WHEN 1 = out[ ]=B”0010”; WHEN 2 = out[ ]=B”0100”; WHEN 3 = out[ ]=B”1000”; END CASE; END; 程序： Truth Table（真值表） i[3..0] Segment 7 0 0 1 1 2 2 … … F F 2. Use Constant Function（常数功能） 如果一个相同的数字、字符串或算术表达式在一个文件中重复多次，就可以使用常数（Constant） 优点 如果需要改变时，只需要改变一个数字。 For Loop 例： SUBDESIGN default1 ( i[3..0] :INPUT; ascii_code[7..0] :OUTPUT; ) BEGIN DEFAULTS ascii_code[]=B; %”?”% END DEFAULTS; TABLE i[3..0] = ascii_code[ ]; B”1000”= B; %”a”% B”0100”= B; %”b”% B”0010”= B; %”c”% B”0001”= B; %”d”% END TABL