buck线路-singleswitching-2015.pptVIP

4.Inductor selection 1) Lower limit is based on output-voltage ripple For single phase example Power solution recommends that the ripple voltage should not exceed 50mV peak-peak 2) Upper limit is based on load current slew Imax=20A ESR=12m OHM,Base on 820uF/6.3V (ESR=36mOhm)*3 So the max inductor per phase is 4.43uH Standard switching solution (single phase) Placement snubber choke D D S High side MOSFET I/P cap O/P Caps Controller S RC snubber I/P Choke Single phase的solution 主要是for chipset 和 Memory。对于Memory 希望在DIMM slot的左右两侧及中间各放一只电容。为了降低output的ripple noise and 平衡输出电容所承担的ripple current，所以O/P choke后端必须放置可以承受经由O/P choke流出ripple current的电容。 Rg and Rgs should be placed as close as possible to the MOSFET Placement summary Controller section 1.??? Controller and its own related components, which should be placed as close as possible to the socket of CPU and they should be beyond a 2 CM distance to the O/P choke and the MOSFET. 2.??? I/P caps should be placed as close as possible to each high side MOSFET. 3.??? Each high side MOSFET should get a MLCC near its drain. 4.??? The source of upper MOSFET and the drain of lower MOSFET should be close to the O/P inductor of the same phase. 5.??? Thermistor should be located to the nearest hottest component such as O/P choke or MOSFET. 6.? All the MLCC of the controller should be located to close with controller. ◆ Single switching consider issue  ? PHASE shape plan ? VIN shape plan ? GND of the snubber ? GND of the LS_MOS ? GND of the Input MLCC Layout PWM IC→ Ref GND Case1: original placement It’s a switching circuit for +5V_DUAL to transform +1.8V_DUAL On the TOP layer，the +1.8V_PHASE shape is too approach super IO On the TOP layer，the GND of snubber is too approach super IO Case1: modify placement Change output choke、HS_MOS and LS_MOS placement on the TOP layer Adjust the +1.8V_PHASE shape to keep longer gaps with super IO device Change the GND of snubber placement on the TOP layer The GND of snubber must