电气规则检查中英文对照.docVIP

Violations associated with buses 与总线有关的错误 Bus indices out of range 总线指数超出范围 Bus range syntax errors 总线语法错误 Illegal bus definitions 非法总线定义 Illegal bus range values 非法总线范围值 Mismatched bus label ordering 总线标签不匹配 Mismatched bus widths 总线宽度不匹配 Mismatched bus-section index ordering 设定的总线 Mismatched bus/wire object on wire/bus 不匹配的总线 Mismatched electrical types on bus 总线电气类型不匹配 Mismatched generics on bus first index Mismatched generics on bus second index Mixed generic and numeric bus labeling 一般数字与总线标签混合 Violations associated with components 违反元件用法 Component implementations with duplicate pins usage 元件重复使用引脚 Component implementations with invalid pin mappings 元件引脚无效 Component implementations with missing pins in sequence 元件缺失引脚 Component containg duplicate sub-parts 部分子元件重复 Component with duplicate implementations 有元件重复 Component with duplicate pins 元件引脚重复 Duplicate component models 重复元件模型 Duplicate part designators 零件标号重复 Errors in component model parameters 元件模型参数错误 Extra pin found in component display mode 在元件显示模型上发现额外的引脚 Mismatched hidden pin connections 隐藏的元件引脚连接 Mismatched pin visibility 可见的引脚不匹配 Missing component model parameters 元件模型参数丢失 Missing component models 元件模型丢失 Missing component models in model files 在模型文档中丢失元件模型 Missing pin found in component display mode 在元件显示方式中发现引脚缺失 Models found in different model locations 在不同的模型地点发现模型 Sheet symbol with duplicate entries 原理图符号重复 Un-designatde parts requiring annotation 未标识部分需要注解 Un sub-part in component Violations associated with documents 与文件相关的错误 Conflicting constraints 冲突的约束 Duplicate sheet numbers 数字部分重复 Duplicate sheet symbol names 原理图名称重复 Missing child sheet for sheet symbol 缺少图纸符号表 Missing configuration target 缺少配置目标 Missing sub-project sheet for component 缺少分项目元件表 Multiple configuration targets 多配置目标 Multiple top-level documents 多个顶层文件 Port not linked to parent sheet symbol 子图表没有连接到总原理图 Sheet entry not linked to child sheet 条目表没有连接到子表 Unique identifiers errors 唯一标识符错误 Violations associate