高速比较器的研究设计与制作.doc

摘 要 比较器是模数(A/D)转换器的重要组成部分，也是电子系统中应用较为广泛的电路之一。比较器的性能，尤其是速度、功耗、噪声、失调，对整个模数转换器的速度、精度和功耗都有着至关重要的影响。比较器的设计以开环高增益放大器的设计为基础。这类比较器属于非线性的模拟电路，其输入和输出之间不存在线性关系。比较器的系统级应用包括便携式和电池驱动的系统、扫描仪、机顶盒和高速差分线接收器。 基于预放大再生锁存理论，本文设计的比较器采用了预放大级结构和动态latch锁存器结构，在传统高速比较器电路结构的基础上应用开关运算放大器技术，提高了分辨率，降低了传输延时。该比较器包括全差分结构的前置放大电路，反相器首尾连接成的双稳态结构为核心的动态再生锁存电路和由两个交叉NMOS晶体管和简单的PMOS共源放大输入组成的输出锁存电路。当时钟信号为低电平时，输入信号和参考信号之差被前置放大电路放大，前置放大电路在获得大的带宽的同时达到较高的增益，有效的提高了比较器的速度，降低了比较器的输入失调电压，比较器输出相对应的逻辑电平，当时钟信号为高电平时，比较器输出被锁存到高电平。 关键词：高速比较器；CMOS；失调电压 Abstract Comparator is one of the most important units in ADCs and widely used in electronic systems.The performances of comparators,such as speed, power consumption,noise, and offset,strongly influence the speed,precision and power consumption of ADCs. Voltage detectors,voltage level transformer,voltage-frequency transformer,sampling/track and hold circuit, zero detectors, peak and delay line detectors all utilize comparators. Based on preamplifier-latch theory,this design of the comparator useing pre-amplifier stage with the structure and dynamic latch structure,on the basis of the traditional structure of high-speed comparator circuit switch,application switching operational amplifier technology, improve the resolution and reduce the transmission delay. the comparator includes a preamplifier circuit of fully differential structure,a regenerative latch whose key components are inverters connected end to end,and a simple output stage which is made up of two cross-coupled NMOS transistor and the PMOS common source amplifier.When clock is low, the difference between input signal and reference signal amplified by preamplifier circuit,Preamplifier circuit get a big bandwidth to achieve high gain in the same time,improve the speed of the comparator effectively,Reduces the input offset voltage of the comparator,comparator output corresponding to logic level.When the clock signal is high,the comparator output is latched to high. Key words： high-speed comparator; CMOS; Offset volt