低相噪PLL频率合成器的研制-微电子学与固体电子学专业论文.docxVIP

华中科技大学硕士学位论文 华 中 科 技 大 学 硕 士 学 位 论 文 II II Abstract Frequency synthesizer is used as frequency source of modern electronic communications and electronic computer systems. It’s an essential device and is called as heart of modern electronic system. With the development and widespread use of modern communications technology and computer technology, spectrum resources is required used to be more intensive, effective and convenient. So increasing demands is asked for the frequency synthesizer. Frequency synthesizer has been a research focus at home and abroad, more and more high-performance frequency synthesizer is being developed. At first, this paper researched the frequency synthesizer research background, technical indicators, and PLL development at home and abroad. Secondly the theoretical foundation of PLL and digital PLL frequency synthesizer is fully introduced. At last two frequency synthesizers are designed and implemented. The frequency range of the first one is 2.65~3.25GHz, frequency step is 5MHz. On the base of full research on all kinds of low phase noise mixed PLL frequency synthesizer, dual PLL frequency synthesizer is selected to be design program. The output frequency of sub PLL and main PLL are mixed through mixer. Then the divider ratio of main PLL is declined, so the phase noise of synthesizer is declined. The output frequency of the second frequency synthesizer is 1.51GHz. Single PLL is selected to achieve the design goal on the base of selecting appropriate device. After the completion of the two local oscillator design and production, the two frequency synthesizers are tested. After the completion of the two local frequency synthesizer, the two frequency synthesizers are measured. Test results show that spurious suppression, hopping time and output power meet the design requirements and achieve the low phase noise of frequency synthesizer. It is proved that through selecting appropriate device and design program to achieve low phase noise synthe