Altera原版文章：数字预矫正1(PPT 35).pptVIP

Digital Predistortion Agenda Introduction Algorithm Standard lookup table method Phase related errors Memory effect Implementation Multipliers Memory Cordic Processors Introduction: Purpose Technology demonstrator Show DPD can be done efficiently on PLD Provide starting point for design Show efficient implementation of key components Provide FPGA benchmark for customer design Introduction: Predistortion Algorithms: Overview Adaptive Lookup Table (LUT) Lookup table for phase and magnitude correction values Deals with magnitude dependent errors Volterra modelling of PA Direct implementation Indirect LUT implementation Algorithm: Distance Gradient Method Assumption: Error only depends on magnitude Algorithm: Distance Gradient Method Dist – Gradient LUT Freq Plots Algorithm: Phase related error Adds dimension to lookup table Increases memory, logic same size as before Increases time to converge LUT content, LUT content, Without phase error compensation With phase error compensation Algorithm: Memory effect Models effect of short term temperature increase on silicon Three possible approaches Add “delta look-up table” (Intersil solution) Add new dimension to LUT (fully adaptive) Use FIR in magnitude address calculation Algorithm: Memory effect PA models: Saleh [1] Memoryless, Errors only dependent on input magnitude Volterra based, with or without memory: [2,3] Error depend on input magnitude and phase Algorithm: Memory effect Error mechanism: Error depends on temperature Temperature depends on previous magnitudes New PA model: Altera model Error depends on current and previous magnitudes Error independent of input phase Solution FIR filter in address calculation DSP Block Architecture Resources TriMatrix? Memory Today’s applications need more high performance memory One size does not fit all Wide choice of modes and widths CORDIC Hardware efficient algorithm for computi