irfs3006-7ppbf.pdfVIP

10/06/08 1 HEXFET

Power MOSFET Benefits
Improved Gate, Avalanche and Dynamic dV/dt Ruggedness
Fully Characterized Capacitance and Avalanche SOA
Enhanced body diode dV/dt and dI/dt Capability
Lead-Free Applications
High Efficiency Synchronous Rectification in SMPS
Uninterruptible Power Supply
High Speed Power Switching
Hard Switched and High Frequency Circuits S D G
 96187 IRFS3006-7PPbF G D S Gate Drain Source


      VDSS 60V RDS(on) typ. 1.5m max. 2.1m ID (Silicon Limited) 293A ID (Package Limited) 240A Absolute Maximum Ratings Symbol Parameter Units ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited) ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Package Limited) IDM Pulsed Drain Current PD @TC = 25°C Maximum Power Dissipation W Linear Derating Factor W/°C VGS Gate-to-Source Voltage V dv/dt Peak Diode Recovery
V/ns TJ Operating Junction and TSTG Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case) Mounting torque, 6-32 or M3 screw Avalanche Characteristics EAS (Thermally limited) Single Pulse Avalanche Energy  mJ IAR Avalanche Current A EAR Repetitive Avalanche Energy  mJ Thermal Resistance Symbol Parameter Typ. Max. Units RθJC Junction-to-Case  ––– 0.4 RθJA Junction-to-Ambient (PCB Mount)  ––– 40 -55 to + 175 ± 20 2.5 10lbin (1.1Nm) Max. 293 207  1172 240 °C A °C/W 300 303 See Fig. 14, 15, 22a, 22b, 375 11
  2 S D G
Pulse width ≤ 400μs; duty cycle ≤ 2%.  Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.  Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS.  When mounted on 1 square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniquea refer to applocation note #