BiasFlybackDesign-Champs-Tech.PDFVIP

Bias Flyback Design There is a requirement in this digital DC-DC converter to supply auxiliary power. The dsPIC requires 3.3V and the gate drivers require 12V. The dsPIC device must have power supplied to it prior to start-up of the supply. The scheme to accomplish this is to utilize an analog converter, not only for start- up, but for continuous operation. This avoids possible glitches or uncontrolled operation events during abnormal operation or unanticipated transient conditions. The analog controller itself will require a boot strap supply once it has gone through soft-start. It has been empirically determined that the auxiliary power will range from 4-6.5W. In the power calculations for the analog bias supply we have assumed a worst case needed power of 7.4W. Pconv : 7.4 The analysis that follows is that of the flyback transformer design required to serve this bias power need. The input voltage range will be that of the DC-DC converter itself, namely 36-72 Vin. We perform our analysis at the minimum input voltage: Vin : 36 We establish the nominal operating frequency of the IC as 250 KHz: 3 1 −6 Fsw : 250⋅10 Tp : Tp 4 ×10 Fsw The dsPIC requires 3.3V and we interpose a linear regulator in advance of that so the headroom required at one output is ~4V. In our analysis we reflect all loads into [1] 12V output: Vout : 12.0 We will assume an overall efficiency of 80%: Eff : .80 With Output Current reflected into [1] 12V Output, we get: Pconv Iout : Iout 0.617 Vout The iteration process in flyback design begins with some choices/assumptions regarding primary magnetizing current and secondary to primary turn ratio. In this design we used: Np : .375 −6 Lm : 42⋅10 Bias Flyback