基于改进溷合式CORDIC算法的直接数字频率合成器设计张晓彤.pdfVIP

6 Vol. 36 o. 6 2008 6 ACTA ELECTRO ICA SI ICA June 2008 CORDIC 张晓彤, 辛 茹, 王 沁,李 涵 ( , 100083) : . CORDIC, ,,/ , ,. , / . -70dB, . SoC . : ; CORDIC; ; : TP30212 : A : 0372-2112 (2008) 06-1144-05 Design of Direct Digital Frequency Synthesizer Based on Improved Hybrid CORDIC lgorithm ZHA G Xiao-tong,XI Ru,WA G Qin,LI Han ( Computer Science Dep artment , Univers ity of Science and Technology Beji ing , Beji ing 100083, China) bstract: An area-efficient design proposal of a direct digital frequency synthesizer is presented.It adoptsthe improved hy- brid coordinate rotation digital computer (CORDIC) algorithm.By cutting down all of rotational phase decision circuits and multi- pliers,adjusting rotational phase error,andfinishing complicated amplitude amendment with simple shift and addition-subtraction cir- cuits,the proposal can decrease the hardware complexity and reduce the circuit area. The pipeline multilevel loop iteration imple- mentation architecture is adopted for reusing shifting and addition-subtraction components highly. The simulation indicates that the miscellaneous interference of output frequency spectrum is lower than - 70dB.And the design has superior speed and resource us- age.The VLSI design proposal has been used in a frequency modulation module of the broadband network System on Chip (SoC) platform. Key words: direct digital frequency synthesizer;hybrid CORDIC;area-efficient;multilevel loop iteration [ 1] 1