基于FPGA的等精度数字频率计设计.docxVIP

摘要频率是常用的物理量，工程中很多物理量的测量，如时间测量、速度控制等，都可转化为频率测量。此外，还经常遇到以频率为参数的测量信号，例如流量、转速等。所以频率测量方法的研究越来越受到重视。基于传统测频原理的频率计的测量精度将随被测信号频率的下降而降低， 在实用中有较大的局限性, 而等精度频率计不但具有较高的测量精度, 而且在整个频率区域能保持恒定的测试精度。本课题设计的等精度数字频率计是采用当今电子设计领域流行的EDA技术，以FPGA为核心，配合STC89C51单片机。同时，采用等精度测频原理，实现了0.01Hz--50MHz信号频率的等精度频率测量。此外，该系统还实现测量周期、脉宽、占空比等功能。设计中用一块FPGA芯片EP2C5Q208C8完成各种时序逻辑控制、计数功能。在Ouartus II平台上，用VHDL语言编程完成FPGA的软件设计、编译、调试、仿真和下载。用STC89C51单片机作为系统的主控部件，实现整个电路的测试信号控制、数据运算处理、键盘扫描和控制数码管的显示输出。系统将单片机STC89C51的控制灵活性及FPGA芯片的现场可编程性相结合，不但大大缩短了开发研制周期，而且使本系统具有结构紧凑、体积小，可靠性高，测频范围宽、精度高等优点。关键词：频率计；EDA技术；FPGA；单片机AbstractFrequency is commonly used physical quantity, lots of measurement of physical quantity in the project, such as the measurement of time, the control of velocity, can be changed into the measurement of frequency. Besides, the measured signal with a frequency parameter, such as the rate of flow, the rotational speed, is often encountered. So the research of the method of measuring frequency has become more and more significant in the real application.According to the principles of traditional frequency measurement , the measurement accuracy of frequencyjavascript:showjdsw(jd_t,j_) meter will decrease with the signal frequency decrease .but it has more limitations in the real application, equal precision frequency meter not only has high accuracy, but also maintains constant test accuracy in the whole frequency region .With the help of FPGA and cooperating with the single chip computer STC89C51,The digital frequency design in our program has realized the precision measurement of 0.01Hz-50MHz signal frequency by adopting the current EDA technique prevailing in the electronic designs and using the principle of multi-period synchrony frequency measurement. Besides, the system can complete the cycle, pulse width, duty cycle measurement function . In this design, using an FPGA chip EP2C5Q208C8 completes a variety of temporal logic control and counting function. In the platform of Ouartus II, using VHDL language complet