CPLD设计BCD的优先编码器、BCD码十进制加法计数器、8位的左右移位寄存器电路、时钟分配电路、步进马达控制电路.docVIP

1 设计一个BCD的优先编码器电路，输入为10个开关的状态，要求输出开 关对应的编码。输出编码用4位表示，第一个开关为0时，输出为0000时，第二个开关为0时，输出为0001时，...... 第10个开关为0时，输出为1001。第10个开关的优先级最高。当没有按键按下时，输出信号E为1。有按键按下时，输出信号E为0。 1顶层原理图及说明 K0-K9为10个开关，Y0-Y3为编码输出，其中K9的优先级最高 2 每个宏单元如何实现（对所写代码的说明） library IEEE; use IEEE.std_logic_1164.all; entity encode is //输入输出初始化 port ( K0: in STD_LOGIC; K1: in STD_LOGIC; K2: in STD_LOGIC; K3: in STD_LOGIC; K4: in STD_LOGIC; K5: in STD_LOGIC; K6: in STD_LOGIC; K7: in STD_LOGIC; K8: in STD_LOGIC; K9: in STD_LOGIC; Y: out STD_LOGIC_VECTOR( 3 DOWNTO 0); E: out STD_LOGIC ); end encode; architecture encode_arch of encode is begin E=K0 AND K1 AND K2 AND K3 AND K4 AND K5 AND K6 AND K7 AND K8 AND K9; //如果都是1的话则E为0 Y=1001 WHEN(K9=0) ELSE //进行优先编码，根据优先级依次判断 1000 WHEN(K9=1 AND K8=0) ELSE 0111 WHEN(K9=1 AND K8=1 AND K7=0) ELSE 0110 WHEN(K9=1 AND K8=1 AND K7=1 AND K6=0 ) ELSE 0101 WHEN(K9=1 AND K8=1 AND K7=1 AND K6=1 AND K5=0 ) ELSE 0100 WHEN(K9=1 AND K8=1 AND K7=1 AND K6=1 AND K5=1 AND K4=0) ELSE 0011 WHEN(K9=1 AND K8=1 AND K7=1 AND K6=1 AND K5=1 AND K4=1 AND K3=0) ELSE 0010 WHEN(K9=1 AND K8=1 AND K7=1 AND K6=1 AND K5=1 AND K4=1 AND K3=1 AND K2=0) ELSE 0001 WHEN(K9=1 AND K8=1 AND K7=1 AND K6=1 AND K5=1 AND K4=1 AND K3=1 AND K2=1 AND K1=0) ELSE 0000 WHEN(K9=1 AND K8=1 AND K7=1 AND K6=1 AND K5=1 AND K4=1 AND K3=1 AND K2=1 AND K1=1 AND K0=0) ELSE XXXX; //若无法确定状态，则输出XXXX end encode_arch; 3 时序仿真结果 4 时序分析 ===================================================================== Timing constraint: Default period analysis 41 items analyzed, 0 timing errors detected. Maximum delay is 13.241ns. ===================================================================== Timing constraint: Default net enumeration 25 items analyzed, 0 timing errors detected. Maximum net delay is 2.435ns. ==============================================================