SingleMask DoublePatterning Lithography（SingleMask DoublePatterning光刻）.pdfVIP

Single-Mask Double-Patterning Lithography Rani S. Ghaida, George Torres, and Puneet Gupta EE Dept., University of California, Los Angeles rani@, torresg@, and puneet@ ABSTRACT This paper proposes shift-trim double patterning lithography (ST-DPL), a cost-effective method for achieving 2 pitch- relaxation with a single photomask (especially at polysilicon layer). The mask is re-used for the second exposure by applying a translational mask-shift. Extra printed features are then removed using a non-critical trim exposure. The viability of ST-DPL is demonstrated. The proposed method has many advantages with virtually no area overhead ( standard-cell area): (1) cuts mask-cost to nearly half that of standard-DPL, (2) reduces overlay errors between the two patterns and can virtually eliminate it in some process implementations, (3) alleviates the bimodal problem in double- patterning, and (4) enhances throughput of first-rate scanners. We implement a small 45nm standard-cell library and small benchmark designs with ST-DPL to illustrate its viability. Keywords: Double patterning, shift-trim, photomask, trim exposure, overlay, bimodal CD distribution, scanner through- put. 1. INTRODUCTION Double-patterning lithography (DPL) is one of the most likely short-term solutions for keeping the pace of scaling beyond 32nm node [6]. It is one of the many resolution enhancement techniques (RET) that have been introduced to push the limit of optical lithography. DPL can be implemented with different manufacturing processes: litho-etch-litho-etch (LELE), litho-litho-etch (LLE), and spacer double-patterning (SDP). In SDP, features are defined by sidewall spacer making it more suitable for well-structured memory cells rathe