防火墙、utm架构分析（Firewall and UTM architecture analysis）.doc

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防火墙、utm架构分析（Firewall and UTM architecture analysis）.doc

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防火墙、utm架构分析（Firewall and UTM architecture analysis）

防火墙、utm架构分析（Firewall and UTM architecture analysis） Firewall and UTM architecture analysis Now, the firewalls and UTM products on the market are roughly divided into three broad categories. The first is based on the X86 platform, which usually uses one or more primary CPU to process business data, and the network card chip and CPU transmit data over the PCI bus. Since the conventional 32 bit PCI bus frequency is 33MHZ, the theoretical communication rate is 132 MB Bytes/S, i.e. 1056 MBits/S. One can from the rate of PCI communication is to meet the needs of firewall, but actually PCI bus is shared in the X86 system, that is to say, if there are two card transfer data at the same time, the rate that each card can receive only 66 MB Bytes/S, namely: 528 Mbits/S, if there are four the network transmits data at the same time, each card can obtain the speed of only 16 MB Bytes/S, 128Mbit/S. From the bus speed based on 32 bit PCI bus to the X86 platform, there is no problem as fast firewall scheme. But X86 platform firewall solution, data from the adapter to the transmission mechanism between CPU is on the break to achieve the interrupt mechanism resulted in a large number of data packets need to be processed under the condition (such as: 64 Bytes packet, hereinafter referred to as packet), firewall throughput rate of X86 platform is not high, about 30% about CPU, and will occupy a very high. This is a common problem for all firewalls based on the X86 platform. Therefore, the X86 platform based on the 32 bit PCI bus can not be used as a Gigabit firewall, because the communication speed of the 32 bit PCI bus can not meet the requirements of Gigabit firewall. To solve this problem, Intel proposes solutions that can upgrade the PCI bus 32 to PCI-E, namely: PCI-Express, 4X, PCI-E bus speed can reach 2000MB Bytes/S, namely 16Gbits/S, PCI-E and PCI are independent of each other between the various devices do not share the bus bandwidth for each PCI-E network port can be used ban