io端口表.docVIP

I/O端口地址表 Port addresses are not always constant across PC, AT and PS2 Unless marked, port addresses are relative to PC and XT only 000-00F 8237 DMA controller: 000 Channel 0 address register 001 Channel 0 word count 002 Channel 1 address register 003 Channel 1 word count 004 Channel 2 address register 005 Channel 2 word count 006 Channel 3 address register 007 Channel 3 word count 008 Status/command register 009 Request register 00A Mask register 00B Mode register 00C Clear MSB/LSB flip flop 00D Master clear temp register 00E Clear mask register 00F Multiple mask register 010-01F 8237 DMA Controller (PS2 model 60 80), reserved (AT) 020-02F 8259A Master Programmable Interrupt Controller: 020 8259 Command port (see 8259) 021 8259 Interrupt mask register (see 8259) 030-03F 8259A Slave Programmable Interrupt Controller (AT,PS2) 040-05F 8253 or 8254 Programmable Interval Timer: 040 8253 channel 0, counter divisor 041 8253 channel 1, RAM refresh counter 042 8253 channel 2, Cassette and speaker functions 043 8253 mode control (see 8253) 044 8254 PS/2 extended timer 047 8254 Channel 3 control byte 060-067 8255 Programmalbe Peripheral Interface (PC,XT,PCjr): 060 8255 Port A keyboard input/output buffer (output PCjr) 061 8255 Port B output 062 8255 Port C input 063 8255 Command/Mode control register 060-06f 8042 Keyboard Controller (AT,PS2): 060 8042 Keyboard input/output buffer register 061 8042 system control port (for compatability with 8255) 064 8042 Keyboard command/status register 070 CMOS RAM/RTC, also NMI enable/disable (AT,PS2, see RTC) 071 CMOS RAM data (AT,PS2) 080 Manufacturer checkpoint port 080-090 DMA Page Registers: 081 High order 4 bits of DMA channel 2 address 082 High order 4 bits of DMA channel 3 address 083 High order 4 bits of DMA channel 1 address 090-097 POS/Programmable Option Select (PS2): 090 Central arbitration control Port 091 Card selection feedback 092 System control and status register 094 System board enable/setup register 095 Reserved 096 Ad