comparchsp15_ec1_introcomparchsp15_lec1_introcomparchsp15_lec1_introcomparchsp15_lec1_intro.pptVIP

* Computer Architecture Lecture 1 * Computational instruction examples Say $t0 = 0 $t1 = 0 $t2 = 0xFFFFFFFF What are the results of the following instructions? sub $t3, $t1, $t0 addi $t4, $t1, 0xFFFF andi $t5, $t2, 0xFFFF sll $t6, $t0, 5 slt $t7, $t0, $t1 lui $t8, 0x1234 * Computer Architecture Lecture 1 * Solutions to examples If $t0 = 0 $t1 = 0 $t2 = 0xFFFFFFFF sub $t3, $t1, $t0 $t3 = 0– 0= 0addi $t4, $t1, 0xFFFF $t4 = 0+ 0xFFFFFFFF = 0andi $t5, $t2, 0xFFFF $t5 = 0xFFFFFFFF AND 0x0000FFFF = 0x0000FFFF sll $t6, $t0, 5 $t6 = 0 5 = 0slt $t7, $t0, $t1 $t7 = 1 if ($t0 $t1) $t0 = 0 $t1 = 0? $t7 = 1 lui $t8, 0x1234 $t8 = 0x1234 16 = 0 * Computer Architecture Lecture 1 * MIPS control instructions Branch instructions test a condition Equality or inequality of rs and rt beq, bne Often coupled with slt, sltu, slti, sltiu Value of rs relative to rt Pseudoinstructions: blt, bgt, ble, bge Target address ? add sign extended immediate to the PC Since all instructions are words, immediate is shifted left two bits before being sign extended * Computer Architecture Lecture 1 * Pseudoinstructions Assembler recognizes “instructions” that aren’t in MIPS ISA Common ops implemented using 1-2 simple instructions Makes code writing easier Example: MIPS only has beq, bne instructions, but assembler recognizes bgt, bge, blt, ble Assembler converts pseudoinstruction into actual instruction(s) If extra register needed, use $at Example: bgt $t0, $t1, label ? slt $at, $t1, $t0 bne $at, $zero, label * Computer Architecture Lecture 1 * MIPS control instructions (cont.) Jump instructions unconditionally branch to the address formed by either Shifting left the 26-bit target two bits and combining it with the 4 high-order PC bits j The contents of register $rs jr Branch-and-link and jump-and-link instructions also save the address of the next instructio