hspic的使用.pptVIP

jingwb Circuit Simulation with HSPICE SPICE Overview About SPICE : Simulation Program with Integrated Circuit Emphasis ~ is a transistor level timing simulation tool Developed by University of California/Berkeley Widely Adopted, Become De Facto Standard In market－SBTSPICE, HSPICE, Spectre ,TSPICE, Pspice, Smartspice ... Simulation Program Structure Node Naming and Scale Factors Instance Element Names C Capacitor D Diode E,F,G,H Current Voltage Source I Current J JFET or MESFET K Mutual Inductor L Inductor M MOSFET Q BJT R Resistor O,T,U Transmission Line V Voltage Source X Subcircuit Call Units and Scale Factors F 1e-15 P 1e-12 N 1e-9 U 1e-6 M 1e-3 K 1e+3 Meg 1e+6 G 1e+9 T 1e+12 DB 20log10 node 0(zero) is always Ground Ground may be 0, GND, !GND example Netlist Structure Transistor Mosfet Mname drain gate source (bulk) model L=* w=* M=* Mp1 vout vin vdd vdd pmos l=2u w=3u m=1 Bipolar Qname collector base emitter model m=* Qp1 vout vin vdd vdd lp11 m=1 Sources and passive elements Source *name net_pos net_neg (*: V, I,) vdd vdd sgnd dc=5 ac=0 Passive elements Resistor: Rname net_pos net_neg model l=* w=* Capacitor: Cname net_pos net_neg model l=* w=* Options statement options list: produces an element summary listing of the input data to be printed. node: causes a node cross reference table to be printed. post: enables storing of simulation results for analysis using the AvanWAves graphical interface or other methods. post=1 binary post =2 acii …. .option list node post Analysis statements DC analysis .dc name start stop step .dc vin 0 5 0.01 AC analysis .ac type np fstart fstop .ac dec 10 1k 100meg TRAN analysis .tran tstart tstop step .tran 1u 1m 10u Lib and others Lib statement .lib ‘path/lib file name’ lib .lib ‘../GP.lib’ TT Comments