EDA课程设计（论文）-数字频率计.docVIP

摘要 数字频率计是直接用十进制数字来显示被测信号频率的一种测量装置。它不仅可以测量正弦波、方波、三角波、尖脉冲信号和其他具有周期特性的信号的频率，而且还可以测量它们的周期。经过改装，可以测量脉冲宽度，做成数字式脉宽测量仪；可以测量电容做成数字式电容测量仪；在电路中增加传感器，还可以做成数字脉搏仪、计价器等。因此数字频率计在测量物理量方面应用广泛。本设计用VHDL在CPLD器件上实现数字频率计测频系统，能够用十进制数码显示被测信号的频率，能够测量正弦波、方波和三角波等信号的频率，而且还能对其他多种物理量进行测量。具有体积小、可靠性高、功耗低的特点。数字频率计是计算机、通讯设备、音频视频等科研生产领域不可缺少的测量仪器。采用VDHL编程设计实现的数字频率计，除被测信号的整形部分、键输入部分和数码显示部分以外，其余全部在一片FPGA芯片上实现，整个系统非常精简，而且具有灵活的现场可更改性。在不更改硬件电路的基础上，对系统进行各种改进还可以进一步提高系统的性能。该数字频率计具有高速、精确、可靠、抗干扰性强和现场可编程等优点。 关键词：FPGA芯片、VHDL语言、数字频率计、数字频率计原理图、EDA技术 Abstract Digital cymometer is to directly show to be measured a kind of diagraph of signal frequency to equip with the decimal system number.It not only can measure sine wave, square wave, triangle wave, sharp pulse signal and other have a period of the frequency of the signal of characteristic, and can also measure their periods.Has been refitted, can measure pulse width, make into the number type vein breadth to measure an instrument;Can measure electric capacity to make into a number type the electric capacity measure an instrument;Increase to spread a feeling machine in the electric circuit, can also make into a number pulse instrument, account a price machine etc..Therefore the digital cymometer accounts in the diagraph physics to measure aspect applied extensive.This design is used VHDL the spare part is at CPLD up carry out digital cymometer to account to measure repeatedly system, can show to be measured the frequency of signal with the decimal system figures, can measure the frequency of sine wave, square wave and triangle wave etc. signal, and return an ability as to its he various physical quantity carry on diagraph.Have the physical volume small and dependable sex Gao and achievement to consume a low characteristics.digital cymometer is the diagraph instrument of research production realm indispensabilities, such as calculator, communication equipments and audio frequency video frequency...etc..The digital cymometer that adopts VDHL to weave a distance