TLC1549CP外文资料翻译.docVIP

外文资料原文 TLC1549CP .10-Bit-Resolution A/D Converter .Inherent Sample and Hold . On-Chip System Clock .CMOS Technology . Total Unadjusted Error…士1 LSB Max .Terminal Compatible With TLC549 andTLV1549 Description TheTLC1549C, TLC15491, and TLC1549Mare10-bit,switched-capacitor,Success- sive-approximation analog-to-digital converters These devices have two digital inputs and a3-state output [chip select (), input-output clock (I/O CLOCK), and data output (DATA OUT)] that provide a three-wire interface to the serial port of a host processor. The sample-and-hold function is automatic. The converter incorporated in these devices features differential high impedance reference inputs that facilitate ratio metric conversion, scaling, and isolation of analog circuitry from logic and supply noise. A switched-capacitor design allows low-error conversion over the full operating free-air temperature range. The TLC1549C is characterized for operation from 0℃ to 70℃. The TLC1549 is characterized for operation from 140℃ to 85℃. The TLC1549M is characterized for operation over the full military temperature range155℃to 125℃ Detailed description： With chip select () inactive (high), I/O CLOCK is initially disabled and DATA OUT is in the high-impedance state. When the serial interface takes active (low), the conversion sequence begins with the enabling of I/O CLOCK and the removal of DATA OUT from the high impedance state. The serial interface then provides the I/O CLOCK sequence to I/O CLOCK and receives the previous conversion result from DATA OUT.I/O CLOCK receives an input sequence that is between 10 and 16 clocks long from the host serial interface. The first ten I/O clocks provide the control timing for sampling the analog input. There are six basic serial interface timing modes that can be used with the TLC1549. These modes are determined by the speed of I/O CLOCK and the operation of as shown in Table 1 .These modes are (1)a fast mode with a 10-clock transfer and inactive (high)