v-by-one thcv213-214 规格书.pdfVIP

THCV213 -214_Rev2.1_E ® THCV213 and 214 LVDS SerDes transmitter and receiver 地址：深圳市福田区竹子林益华大厦 General Description tern which expedites the link establishment. 214 has an indicator of its PLL status. THCV213 and 214 are designed to support pixel data transmission between the Host and Display. The chipset can transmit 18bit data and 4bit control data through Features only a single differential cable at a pixel clock fre- quency from 5MHz to 40MHz. • Transmit 18bit data and 4bit control data via a single By V-by-One® technologies, unique encoding scheme differential cable and proprietary CDR technique, a link synchronization • Wide frequency range: 5MHz to 40MHz is achieved without any external frequency reference • Support SYNC pattern and LOCK indicator such as a crystal oscillator. It drastically improves the cost and space of PCBs of a display system. • Pre Emphasis mode THCV213 transmitter converts input data into a single • Clock edge selectable LVDS serial data stream with the embedded clock. It • Dual Display mode supports pre-emphasis for a long cable transmission. • Power Down mode 214 receiver extracts the clock from the embedded clock and transforms the serial data stream back into the • Low power single 3.3V CMOS design parallel data. • 48pin TQFP To confirm the reliability of the link, several functions are supported. THCV213 can transmit the SYNC pat- Block Diagram THCV213 THCV214 D[17:0] TXOUT1+ RXIN+ D[17:0] DE