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Techniques and Tradeoffs of Pure-Pin and Multiplexed ICT Architectures May 2006 Agenda Multiplexed vs Pure-Pin ICT Architectures Definitions and comparisons Benefits and limitations Dimensions of multiplexing Historical Tradeoffs to Achieve Pure-Pin Feature limitations Performance compromises New Advances in Pure-Pin Design Pure-pin without performance compromises Reduced price/performance thresholds What is Multiplexing? A technique for sharing (or pooling) tester instruments among a large number of test points Multiplexing increases the number of test points that have access to ICT instruments Multiplexing places rules on how test instruments can be accessed during testing Benefits of Multiplexed ICT Designs Lower Cost Fewer instruments required in the ICT system Higher Performance Since fewer instruments are required, they can be designed for higher performance Higher Pincounts Multiplying effect of multiplexing increases available pincounts Less Power Do not need to support infrastructure of instrument behind every test point Disadvantages of Multiplexed Designs Programming Restrictions Limits on which tester nails can be used together Nail assignment software is required to analyze and resolve conflicts Fixture Build Delays Fixture assembler cannot randomly wire nails to test points Must wait until program and nail assign wiring reports are complete Real Pin Limitations High pincount devices may exceed real pin count limits of the multiplexed system May require tests to be broken up into multiple bursts Debug Restrictions Debug activities (like adding guards/isolations) and ECO activities (like adding components) may cause conflicts that require adding or moving fixture wires Pure-Pin ICT Designs Designed to Solve Disadvantages Associated with Multiplexed System Real driver/sensor for every test point All D/S can be used simultaneously Less fixture build delays No real nail limitations No debug restrictions requiring fixture re-wiring But how can p