WAT-Basic-Introduction教材课程.pptVIP

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WAT-Basic-Introduction教材课程.ppt

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WAT-Basic-Introduction教材课程.ppt

WAT Basic Introduction;Summary;What is WAT?;;Why do we need WAT?;Test pattern: 1)Test Line/Test Key: Production monitor, located on the Scribe Line and will be destroyed after die saw. 2)Test Chip: Design Rule check/Yield monitor/Process Qualification, usually chip size, for initial process technology development.;WAT basic concept/device/layout.cont;WAT basic concept/device/layout.cont;Typical WAT testkey layout;Device parameter MOS;Continuity and Spacing of Poly, Metal;Field Device;Gate oxide integrity;Sheet resistance (Rs_N+/P+/NW/Po);Contact Resistance (Rc_N+, P+, Via); Stack contact chain CT-Via resistance pattern : Purpose: To monitor stack contact Rc from CT to V1 , mainly focus on MET/VIA overlay, and metal island process);In linear region: In Saturation region: When Id =Idsat, Vd=VG-Vth, and So, ;2. VTLIN_N: VD=0.05V, VS=VB=0V,VG=0 to 0.8*1.8V, whereas 1.8V is VDDN Measure VTLIN_N=VG @ ID=0.1uA*(W/L) [To simplify the calculation, the transistor was considered turned on when ID=0.1uA*(W/L)] Typical Value: VTLIN_N_10/10 = 0.37V VTLIN_P_10/10= -0.44V VTLIN_N_10/0.18= 0.44V VTLIN_P_10/0.18 = -0.5V VTLIN_N_0.22/10 = 0.31V VTLIN_P_0.22/10 = -0.41V VTLIN_N_0.22/0.18 = 0.36V VTLIN_P_0.22/0.18 = -0.5V VTLIN_N3.3_10/10 = 0.68V VTLIN_P3.3_10/10 = -0.73V VTLIN_N3.3_10/0.35 = 0.72V VTLIN_P3.3_10/0.35 = -0.68V VTLIN_N3.3_0.22/10 = 0.56V VTLIN_P3.3_0.22/10 = -0.68V 3. VTSAT_N: VD=1.8V, VS=VB=0V,VG=0 to 0.8*1.8V, whereas 1.8V is VDDN Measure VTSAT_N = VG @ ID=0.1uA*(W/L) [VD=VDDN, to make sure that the transistor is working at the saturation status]; 4. IDSAT_N: VD=VG=VDDN=1.8V, VS=VB=0, Measure IDSAT_N=ID (then divide by W in some calculation) Typical Value: IDSAT_N_10/0.18 = 6mA IDSAT_P_10/0.18 = -2.59mA (600 uA/um) (-259 uA/um) IDSAT_N_0.22/10 = 4uA IDSAT_P_0.22/10 = -1.1uA IDSAT_N_0.22/0.18 = 180uA IDSAT_P_0.22/0.18 = -60A IDSAT_N3.3_10/0.35 = 6mA IDSAT_P3.3_10/0.35 = -3mA IDSAT_N3.3_0.22/1