基于FPGA的IIR数字滤波器设计精选.docVIP

摘 要 数字信号处理在科学和工程技术等许多领域中得到了广泛的应用，其中数字滤波器是现代数字信号处理系统的重要组成部分。无限长单位冲激响应（IIR）数字滤波器是非常重要的一类滤波器，与有限长单位冲激响应（FIR）数字滤波器相比，IIR能够以较低的阶次获得较高的频率选择特性从而得到了广泛的应用。本课题采用一种基于现场可编程门阵列（FPGA）的IIR数字滤波器的设计方案。首先基于IIR数字滤波器的相关理论知识，研究了IIR数字滤波器的常用设计方法，并分析了各种IIR数字FPGA的结构特点，研究了IIR数字滤波器的FPGA设计与实现，并通过Quartus Ⅱ设计平台，采用自顶向下的模块化设计思想，将整个IIR数字滤波器分为：时序控制、延时、补码乘加和累加四个功能模块。分别对各模块进行VHDL语言描述，并进行了仿真和综合。仿真结果表明，本设计的IIR数字滤波器运算速度较快，系数改变灵活，有较好的参考价值。 关键词:数字滤波器；无限长单位冲激响应；现场可编程门阵列；VHDL硬件描述语言 ABSTRACT Digital signal processing is widely used in lots of fields, such as in science and project technique, Digital filter is one of the important contents of digital signal process. Infiinite impulse response units (IIR) digital filter is a very important type of filters. With its good characteristic of frequency selection in lower order in comparison with finite impulse response (FIR), IIR digital filter is widely applied in modern signal processing systems. This subject is a IIR digital filter design based on the using of field programmable gate array (FPGA). Firstly, based on the analysis of IIR basic realization architectures and the related theoretic analysis, the design methods of IIR sigital filter has been discussed and the structures of a variety of IIR digital filter which can be realized has been analysised. For the results of the theoretical analysis, the final architecture and realization of IIR digital has been decided, Based on the structural characteristics of FPGA, the FPGA design and realization of IIR digital filter has been researched. By used the design plant of Quartus Ⅱ, we adopt blocking method named “Top-down ” and divide the entire IIR digital filter into four blocks, which are Clock control, Time delay, Multiply-addition and Progression. After described with VHDL，we do emulate and synthesis to each block. The result shows that, the introduced IIR digital filter runs fast, and the coefficient changes agility. It has high worth for consulting. Key Words: Digital filter; infinite impulse response units