电气专业毕业设计外文文献与中文翻译.docVIP

附录： 外文资料与中文翻译 外文资料： Needs of Multimedia Processor Dynamic Power Management Technology Active Power Management On-chip power management techniques fall into two broad categories, the management of system power consumption and standby power consumption management. Active Power Management is divided into three areas: dynamic voltage and frequency scaling (DVFS), adaptive voltage scaling (AVS) and dynamic power switching (DPS). Static power management systems need to ensure that the idle processing power needed before a higher power in the state, that is, the use of the so-called static leakage management (SLM) technology, this kind of management is usually dependent on power from standby to several low power consumption patterns. Lets take a look at the active mode. Using DVFS techniques, application performance can be based on demand software to reduce the clock speed and voltage. For example, we may envisage a high-level integrated RISC microprocessor (ARM) and digital signal processor (DSP) applications processor. Although the ARM speed components can be as high as 600 MHz, but the system does not always need such a high computing power. Usually, we can choose software to predefined performance point processor (OPP), the voltage at this time to ensure that the processor in the system can meet performance requirements on the minimum frequency. In order to adapt to different applications to further enhance the flexibility to optimize power, we can interconnect for processors and peripherals in addition a set of predefined core devices OPP. OPP software in accordance with an external regulator is required to send control signals to set the minimum voltage. For example, DVFS apply to the two supply voltage VDD1 (DSP and ARM processors supply voltage) and VDD2 (peripheral subsystems interconnection and power supply voltage), the two voltage rails to provide the majority of chip power ( usually 75% to 80%). In the implementation of MP3 decoder, the DSP processor can b