超大规模集成电路设计导论(VLSI)总复习(全英).docxVIP

VLSI复习题型：缩写 5题 10分简答 12题 60分计算 3题 30分缩写英文中文VLSIVery large scale integration超大规模集成VTCVoltage transfer characteristic电压传输特性PTPass-Transistor传输管TGTransmission Gate传输门CPL/DPLDifferential Pass-transistor Logic差分传输管逻辑MSMaster-Slave主从ETEdge-Triggered边沿触发CMOSComplementary metal oxide semiconductor互补型金属氧化物半导体管NoCOn-Chip Network片上网络SoCSystem on Chip片上系统IPIntellectual Property?专利GAGate Array门阵列FPGAField-Programmable Gate Array现场可编程门阵列PLAProgrammable Logic Array可编程逻辑阵列PLDProgrammable Logic Device可编程逻辑器件PALProgrammable Array Logic Device可编程阵列逻辑器件LUTLook-up Table查表FAMOSFloating-gate transistor(metal oxide semiconductor)浮栅晶体管S/DRAMStatic/Dynamic Random Access Memory静/动态可读写存储器RWMRead-write memory读写存储器ATDAddress Transition Detection地址翻转探测DFTDesign-for-test可侧性设计DUTDevice under test被测器件BISTBuilt in self test内建自测试EDAElectronic Design Automation电子设计自动化TSPCRTrue Single-Phase Clocked Tegister真单相钟控寄存器Chapter 01How?to?evaluate?performance? Cost? Reliability? Speed?(delay,?operating?frequency)? Power?dissipationRegenerative propertyDelay :Chapter 02Inverter layoutPhotolithography processOxidation layering(氧化层)Pthotoresist coating（涂光刻胶）Stepper exposure（光刻机曝光）Photoresist development and bake(光刻胶的显影和烘干)Acid etching（酸刻蚀）Spin, rinse, and dry（旋转，清洗和干燥）Various process steps：Ion?implantation（离子注入）Plasma?etching（等离子刻蚀）Metal?deposition（金属沉淀）Photoresist removal( or ashing) 去除光刻胶（即“沙洗”）Chapter 03Linear/ Saturation modeLong channel vs short channelCapacitances= structure capacitances+channel capacitances+MOS diffusion capacitancesResistance=MOS sructure resistance+source and drain resistance+cantact resistance+wiring resistanceWith?silicidation R方块? is?reduced?to?the?range?1?to?4?Ω/方块（source and drain resistance）Chapter 04Cwire =?Cpp +??Cfringe +?CinterwireDealing with resistance:Use better interconnect materialsMore interconnect layersRC Mode? Lumped?RC?model– total?wire?resistance?is?lumped?into?a?single?R?and?total?capacitance?into?a?single?C– good?for?short?wires;?pessimistic?and?inaccurate?for?long?