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Layout of Analog CMOS Integrated Circuit unipv(布局的模拟CMOS集成电路unipv)
F. Maloberti
Layout of Analog
CMOS
Integrated Circuit
Part 2
Transistors and Basic Cells Layout
F. Maloberti - Layout of Analog CMOS IC
1
Outline
Introduction
Process and Overview Topics
Transistors and Basic Cells Layout
Passive components: Resistors, Capacitors
System level Mixed-signal Layout
F. Maloberti - Layout of Analog CMOS IC
2
Part II: Transistor and Basic Cell Layout
Transistors and Matched Transistors
Layout of a single transistor
Use of multiple fingers
Interdigitated devices
Common Centroid
Dummy devices on ends
Matched interconnect (metal, vias, contacts)
Surrounded by guard ring
Design for Layout
Stacked layout of analog cells
Stick diagram of analog cells
Example 1: two stages op-amp
Example 2: folded cascode
F. Maloberti - Layout of Analog CMOS IC
3
Single Transistor Layout
A CMOS transistor is the crossing of two rectangles,
polysilicon and active area
but, … we need the drain and source connections and we
need to bias the substrate or the well
Polysilicon gate
diffusion
F. Maloberti - Layout of Analog CMOS IC
4
Source and Drain Connections
Ensure good connections
Multiple contacts or one big contact?
F. Maloberti - Layout of Analog CMOS IC
5
Multiple or single contacts?
Curvature in the metal layer can lead to micro-fractures
Not important for large areas
Reliability problems, possible electro-migration
F. Maloberti - Layout of Analog CMOS IC
6
Multiple contacts: Exercise
Cons
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