计算机设计与实践——32位ALU设计精要.pptx

32位ALU设计;module alu(alu_da,alu_db,alu_clt,alu_shift,alu_zero_out,overflow_out,alu_dc ); input [31:0]alu_da; input [31:0]alu_db; input [3:0]alu_clt; input [4:0]alu_shift; output reg alu_zero_out; output reg overflow_out; output reg [31:0]alu_dc; wire alu_zero; wire overflow; wire [31:0]alu_and;//与结果 wire [31:0]alu_or;//或结果 wire [31:0]alu_xor;//异或结果 reg [31:0]alu_sll;//左移结果 reg [31:0]alu_srl;//右移结果 reg [31:0]alu_sra;//算数右移 wire [31:0]alu_add;//加减运算结果 wire c2;//加法器进位输出 reg Sub;//加法器控制端 wire [31:0]alu_db_n;//b取非运算 reg [31:0]alu_db_mux;//b的加减选择运算 wire ci;//进位输出 always@(*) begin case(alu_clt) 0:alu_dc=alu_and;//逻辑与运算 1:alu_dc=alu_or;//逻辑或运算; 2:alu_dc=alu_xor;//逻辑异或运算 3:alu_dc=alu_sll;//左移运算 4:alu_dc=alu_srl;//右移运算 5:alu_dc=alu_sra;//算数右移运算 6: //无符号加运算 begin Sub=0; alu_dc=alu_add; alu_zero_out=0; overflow_out=0; end 7: //无符号减运算 begin Sub=1; alu_dc=alu_add; alu_zero_out=0; overflow_out=0; end 8: //有符号加运算 begin Sub=0; alu_dc=alu_add; alu_zero_out=alu_zero; overflow_out=overflow; end 9: //有符号减运算 begin Sub=1; alu_dc=alu_add; alu_zero_out=alu_zero;; overflow_out=overflow; end 10: //无符号小于置1运算 begin Sub=1; if(c2==0) alu_dc=1; else alu_dc=0; end 11: //有符号小于置1运算 begin Sub=1; if(alu_add[31]==1) alu_dc=1; else alu_dc=0; end default:alu_dc=alu_dc; endcase end assign alu_and=alu_daalu_db; assign alu_or=alu_da|alu_db; assign alu_xor=alu_da^alu_db; always@(*) begin case(alu_shift); 0:alu_sll=alu_da; 1:alu_sll=alu_da1; 2:alu_sll=alu_da2; 3:alu_sll=alu_da3; 4:alu_sll=alu_da4; 5:alu_sll=alu_da5; 6:alu_sll=alu_da6; 7:alu_sll=alu_da7; 8:alu_sll=alu_da8; 9:alu_sll=alu_da9; 10:alu_sll=alu_da10; 11:alu_sll=alu_da11; 12:alu_sll=alu_da12; 13:alu_sll=alu_da13; 14:alu_sll=alu_da14; 15:alu_sll=alu_da15; 16:alu_sll=alu_da16; 17:alu_sll=alu_da17; 18:alu_sll=alu_da18; 19:alu_sll=alu_da19; 20:alu_sll=alu_da20; 21:alu_sll=alu_da21; 22:alu_sll=alu_da22; 23:alu_sll=alu_da23; 24:alu_sll=alu_da24; 25:a