乘法器电路设计.ppt

9.2 乘法器设计;9.2.1 并行乘法器;【例9.4】8位并行乘法器 module mult( outcome, a, b); parameter size = 8; input[size:1] a, b; // 源操作数 output[2*size:1] outcome; // 乘积 assign outcome = a*b; // 相乘 endmodule;8位并行乘法器RTL图;9.2.2 移位相加乘法器;【例9.16】8位二进制数的乘法 module mult_for( outcome, a, b ); parameter size = 8; input[size:1] a, b; output[2*size:1] outcome; reg[2*size:1] outcome; integer i;;always @( a or b ) begin outcome = 4’h0; for( i = 1; i = size; i = i+1 ) if( b[i] ) outcome = outcome + ( a (i-1) ); end endmodule;乘法器的功能仿真波形图;9.2.3 查找表乘法器; 设计思路; 8位查找表乘法器 Y = A×B A = A1×24+A2 B = B1×24+B2 则 Y = ( A1×24+A2 )×( B1×24+B2 ) = A1×B1×28 + A1×B2×24 + A2×B1×24 + A2×B2;【例9.5】 8×8查找表乘法器 /********** 2×2查找表乘法器 *********/ module lookup( out, a, b, clk ); output[3:0] out; // 乘积 input[1:0] a, b; // 操作数 input clk; reg[3:0] out; reg[3:0] address; // 存储器地址;always @( posedge clk ) begin address = { a, b }; case( address ) 4h0: out = 4b0000; 4h1: out = 4b0000; 4h2: out = 4b0000; 4h3: out = 4b0000; 4h4: out = 4b0000; 4h5: out = 4b0001; 4h6: out = 4b0010; 4h7: out = 4b009;; 4h8: out = 4b0000; 4h9: out = 4b0010; 4ha: out = 4b0100; 4hb: out = 4b090; 4hc: out = 4b0000; 4hd: out = 4b009; 4he: out = 4b090; 4hf: out = 4b1001; default: out = 4bx; endcase end endmodule;/*************** 4×4查找表乘法器 ****************/ module mult4x4( out, a, b, clk ); output[7:0] out; // 乘积 input[3:0] a, b; // 操作数 input clk; reg[7:0] out; reg[1:0] firsta, firstb; // 操作数高2位 reg[1:0] seconda, secondb; // 操作数低2位 wire[3:0] outa, outb, outc, outd; // 乘积每2位1组;always @( posedge clk ) begin firsta = a[3:2]; seconda = a[1:0]; firstb = b[3:2]; secondb = b[1:0]; end;lookup m1( outa, firsta, firstb, clk ), // 元件调用 m2( outb, firsta, secondb, clk ), m3( outc, seconda, firstb, clk ), m4( outd, seconda, secondb, clk ); always @( posedge clk ) begin ou