LM12L458CIVNOPB;中文规格书,Datasheet资料.pdfVIP

LM12L458 LM12L458 12-Bit + Sign Data Acquisition System with Self-Calibration Literature Number: SNAS085A / LM12L458 12-Bit + Sign Data Acquisition System with Self-Calibration General Description The LM12L458 is a highly integrated 3.3V Data Acquisition System. It combines a fully-differential self-calibrating (cor- recting linearity and zero errors) 13-bit (12-bit + sign) analog- to-digital converter (ADC) and sample-and-hold (S/H) with extensive analog functions and digital functionality. Up to 32 consecutive conversions, using two’s complement format, can be stored in an internal 32-word (16-bit wide) FIFO data buffer. An internal 8-word RAM can store the conversion sequence for up to eight acquisitions through the LM12L458’s eight-input multiplexer. The LM12L458 can also operate with 8-bit + sign resolution and in a supervisory “watchdog” mode that compares an input signal against two programmable limits. Programmable acquisition times and conversion rates are possible through the use of internal clock-driven timers. All registers, RAM, and FIFO are directly addressable through the high speed microprocessor interface to either an 8-bit or 16-bit data bus. The LM12L458 includes a direct memory access (DMA) interface for high-speed conversion data transfer. Additional applications information can be found in applica- tions notes AN-906, AN-947 and AN-949. Key Specifications (fCLK = 6 MHz) n Resolution 12-bit + sign or 8-bit + sign n Single supply +3V to +5.5V n 13-bit conversion time 7.3 μs n 9-bit conversion time 3.5 μs n 13-bit Through-put rate 106k samples/s (min) n Comparison time (“watchdog” mode) 1.8 μs (max) n ILE ±1 LSB (max) n Power Consumption 15 mW (max) n Stand-by mode 5 μW (typ) Features n Three operating modes: 12-bit + sign, 8-bit + sign, and “watchdog” n Single-ended or differential inputs n Built-in Sample-and-Hold n Instruction RAM and event sequencer n 8-channel multiplexer n 32-word conversion FIFO n Programmable acquisition times and conversi