DSP Instruction Set Architecture.pdfVIP

1DSP Instruction Set Architecture Case Study: TMS320C6713 What is DSP? A digital signal processor (DSP) is an integrated circuit designed for high-speed data manipulations, for example, audio, video and communications 2DSP of Analog Signals Characteristics of DSP Applications Computationally demanding (multiply, multiply-accumulate …) Stringent real-time requirement “Streaming” data High data bandwidth Predictable program flow 3A Typical DSP System DSP Memory A/D Power Supply C om m un ic at io n P or ts Computational Architectures 4Modern DSPs Texas Instruments TMS320C6x DSP family Freescale MSC81xx multi-core DSP family Analog Devices SHARC, Blackfin C67x DSP Roadmap 5C6713 DSK Overview 225 MHz TMS320C6713 floating point DSP AIC23 stereo codec 8~92 KHz sample rates Memory 16 MB dynamic RAM 512 KB nonvolatile FLASH memory General purpose I/O 4 LEDS 4 DIP switches USB interface to host PC C6713 DSK Physical Layout 6Functional Block Diagram C6713 DSP Features Highest-Performance Floating-Point Digital Signal Processor (DSP) Eight 32-Bit Instructions/Cycle 32/64-Bit Data Word Advanced Very Long Instruction Word (VLIW) TMS320C67x DSP Core Eight Independent Functional Units: Two ALUs (Fixed-Point) Four ALUs (Floating- and Fixed-Point) Two Multipliers (Floating- and Fixed-Point) Load-Store Architecture With 32 32-Bit General-Purpose Registers L1/L2 Memory Architecture 4K-Byte L1P Program Cache (Direct-Mapped) 4K-Byte L1D Data Cache (2-Way) 256K-Byte L2 Memory Total: 64K-Byte L2 Unified Cache/Mapped RAM, and 192K-Byte Additional L2 Mapped RAM Enhanced Direct-Memory-Access (EDMA) Controller (16 Independent Channels) Two Multichannel Buffered Serial Ports: Serial-Peripheral-Interface (SPI) High-Speed TDM Interface AC97 Interface 7C6713 Block Diagram C6713 Data Path D2 DS1S2 M1 D S1 S2 D1 D S1 S2 2X1X L1 S1 S1 S2 DLSL SLD DL S2S1D M2 S2 D DL SLS2 S1S1S2 D Registers B0 - B15Registers A0 - A15 L2 S2SL D DL S1 2 Data Paths 8 Functional Units Orthogonal/Independent 2 Floa