电子科技大学2010期末数字电子技术考试题A卷-参考答案.doc

电子科技大学二零零九至二零一零学年第 二 学期期 末 考试 数字逻辑设计及应用 课程考试题 A 卷（120分钟）考试形式：闭卷 考试日期2010年7月12日 课程成绩构成：平时 20 分， 期中 20 分， 实验 0 分， 期末 60 分 一 二 三 四 五 六 七 八 九 十 合计 复核人签名 得分 签名 一、To fill your answers in the blanks（1’×25） 1. If [X]10= - 110, then [X]twos-complement=[ ]2, [X]ones-complement=[ ]2. (Assumed the number system is 8-bit long) 2. Performing the following number system conversions: A. 2=[ 000111010010 ]2421 B. [1625]10=[ 0100100101011000 ]excess-3 C. [ 1010011 ]GRAY =[ ]8421BCD 3. If , then FD( 1，4，5，6 )=(0，2，3，7 ). 4. If the parameters of 74LS-series are defined as follows: VOLmax = 0.5 V, VOHmin = 2.7 V, VILmax = 0.8 V, VIHmin = 2.0 V, then the low-state DC noise margin is 0.3V ,the high-state DC noise margin is 0.7V . 5. Assigning 0 to Low and 1 to High is called positive logic. A CMOS XOR gate in positive logic is called XNOR gate in negative logic. 6. A sequential circuit whose output depends on the state alone is called a Moore machine. 7. To design a 001010 serial sequence generator by shift registers, the shift register should need 4 bit as least. 8. If we use the simplest state assignment method for 130 sates, then we need at least 8 state variables. 9. One state transition equation is Q*=JQ+KQ. If we use D flip-flop to complete the equation, the D input terminal of D flip-flop should be have the function D= JQ+KQ . Which state in Fig. 1 is ambiguous D A CMOS circuit is shown as Fig. 2, its logic function z= A’B’+AB Fig. 1 Fig. 2 If number [A]twos-complement and [B]ones-complement =1001, calculate [A-B]twos-complement and indicate whether or not overflow occurs.(Assumed the number system is 8