《《数字电路设计》课堂笔记整理段成华老师.docxVIP

Digital Integrate Circuit Design Class NoteVersion1.0.0Announcement 因为时间仓促和平时课上条件所限，中间有错误漏掉的，请大家自行更正。部分内容没有写（比如FPGA，FIFO）参看课程资源和参考书，如NOTE 有误务请通知作者ysjk2000@。Referance书【1】：James R. Armstrong, F. Gail Gray . VHDL设计表示和综合（原书第2版）. 李宗伯，王蓉晖，王蕾等译.机械工业出版社.2002.书【2】：阎石.数字电路技术基础（第5版）.高等教育出版社.2004.Chapter 1 Design Abstraction and Representation1.1 The Problem of IC. Design and the Solutions1.1.1 A History Perspective(1) First IC.(1958) Jack Kilby (1923~2005)德州电器TTL逻辑→80年代，2000年 Nobel Price.1.1.2 IC. Design Complex(1) ITRS(International Technology Roadmap for Semiconductor)(2)工艺参数：年份特征尺寸(nm)门极电压(v)数量备3102100M1亿2010450.61B10亿2016224.2100B(3) ComplexFeature Size(特征尺寸)：Gate-equivalent Corresponds to a 2 input NAND gate做一个与非门的面积λ法则λ roughly half the length of the small transistor.Reliably(可信性) variability(变化性)(4)Solution解决复杂性的方案Design Abstraction 设计抽象Formal Representation 正式表达1.2 Design Representation1.2.1 Y-chart 1983 Daniel D. Gajski(1)Abstract level 见书【1】Page2 表1-11System level系统级2Chip level芯片级3Register-Transfer level寄存器级4Logic gate level逻辑门级*Switch level交换级5Circuit level电路级6Layout level版图级*为老师所讲可忽略一级图1 Y图表示结构表示功能表示几何表示处理器内存交换寄存器转化电路系统算法布尔表达板图规划若干单元遮罩(mask)几何(2)Main Components of Y-chart rep.a) Behavioral rep. (BR, BD)Def.: a design as a black box and describes its output in term of its input and time, indicating no information about the implementation or structure.Example: no any geometric information to some extent, no structure information.b) Structure Rep. (SD, SR):Def.: A black box is represented as a set of components and connects (interconnection).Acting a bridge between BR and GR, no physical information is contained.Example:(3)Geometric Rep.(GR, GD)a) Def.: Specifying size (height and width) of each components; the position and interconnected on silicon die.1.2.2 Hardware Design language (HDL)An example of model HDL: 1970s SpecificationPort inv (in)→out Nfet out in vss Pfet out in vdd/end高级语言↓低级语言创建时Delay问题并