第4章存储层次结构设计(免费阅读).ppt

1s = 10 3 毫秒 = 10 6 微秒 = 10 9 纳秒 = 10 12 皮秒 * * Let’s use a specific example with realistic numbers: assume we have a 1 KB direct mapped cache with block size equals to 32 bytes. In other words, each block associated with the cache tag will have 32 bytes in it (Row 1). With Block Size equals to 32 bytes, the 5 least significant bits of the address will be used as byte select within the cache block. Since the cache size is 1K byte, the upper 32 minus 10 bits, or 22 bits of the address will be stored as cache tag. The rest of the address bits in the middle, that is bit 5 through 9, will be used as Cache Index to select the proper cache entry. +2 = 30 min. (Y:10) This is called a 2-way set associative cache because there are two cache entries for each cache index. Essentially, you have two direct mapped cache works in parallel. This is how it works: the cache index selects a set from the cache. The two tags in the set are compared in parallel with the upper bits of the memory address. If neither tag matches the incoming address tag, we have a cache miss. Otherwise, we have a cache hit and we will select the data on the side where the tag matches occur. This is simple enough. What is its disadvantages? +1 = 36 min. (Y:16) 指令命中时间为1，失效率为1%,失效开销为50，取指令所占比例100/(100+30) Load和store操作失效率为10%,失效开销为50，取指令所占比例30/(100+30) (1.5+.5)/(1.1+1.5+.5) = 65% 练习：Appendix B B10 若采用多级包容inclusive hierarchy, 在L1中发生失效 1、访问L2 2、如果在L2中命中，则从L2中调入相应的块到L1中，同时，L1中要换出的块 存放到L2中（如果L2中不存在该丢弃的块，何时出现这种情况？答，当L2中的块大小大于L1中的块大小时 ？？？） 3、如果在L2中没命中，则从 Memory中调入对应的块到L1和L2，同时，L1中要换出的块 存放到L2中（如果L2中不存在该丢弃的块，何时出现这种情况？） 4、在这两种情况下，如果在L2中存储L1中换出的块导致L2的换出动作，那么L1必须检查L2换出的块是否在L1中，如果该块在L1中，则需要invalidated 该块。 若采用多级互斥exclusive hierarchy, 在L1中发生失效 1、访问L2 2、如果在L2中命中，则从L2中调入对应的块到L1中，同时，将L2中该对应块置为失效(invalidated), 将L1中换出的块写到L2中（可能L2中不存在该L1丢弃的块） 3、如果在L2中没命中，则从Memory中调入对应的块到L1,同时，将L2中该对应块置为失效(invalidated), 将L1中换出的块写到L2中（可能L2中不存在该L1丢弃的块） 无论是inclusive 还是exclusive， 如果L1中被丢弃的块是脏块，则L1中被丢弃的块必须写入L2中。 * * The University of Adelaide, S