SARADC讲稿.ppt

– * – Advanced Analog IC Design Successive Approximation ADC Professor Y. Chiu ECE 581 Fall 2009 After Four Clock Cycles… DAC设计 比较器设计 由于生产工艺过程中的误差造成电路结构不能和设计中的那样对称，引起比较器的失调。 比较器的失调电压会对比较器的性能和比较器后续电路的工作有影响，会造成误码现象。 比较器一般有下面两种形式的失调消除方式： 输入失调电压存储方式 输出失调电压存储方式 其电路包括前置放大器，失调存储电容，还有锁存单元。 输入失调电压存储方式 输出失调电压存储方式 多级简单预放大+锁存结构 低输入电容SAR ADC 全差分输入SAR ADC 时域比较器 ADC的测试方法 1、静态测试 2、动态测试 Dynamic Testing Types of Dynamic Tests Histogram or Code-Density Test FFT Test Fischer 08 * Histogram or Code-Density Test DNL appears as deviation of bin height from ideal value. Integral nonlinearity (INL) is cumulative sum (integral) of DNL. Offset is manifested by a horizontal shift of curve. Gain error shows as horizontal compression or decompression of curve. Fischer 08 * Histogram Test Input frequency must be selected carefully to avoid missing codes (fclk/fin must be non-integer ratio). Input Swing is critical (cover full range) Requires a large number of conversions (o 2n x 1,000). Fischer 08 * Simulated Histogram Test Fischer 08 * FFT Test Pros and Cons of FFT Test Offers quantitative Information on output Noise, Signal-to-Noise Ratio (SNR), Spurious Free Dynamic Range (SFDR) and Harmonic Distortion (SNDR). FFT test requires fewer conversions than histogram test. Complete characterization requires multiple tests with various input frequencies. Does not reveal actual code conversions Fischer 08 * Simulated FFT Test SFDR=60 dB SNDR=49 dB ? ENOB=7.85 * * * 模数转换器 主要内容 1、ADC的性能指标 2、SAR ADC的设计 3、ADC的测试方法 采样速率 奈奎斯特ADC 过采样ADC SAR ADC Pipelined ADC Cyclic ADC Dual-slope ADC Flash ADC Sigma-delta ADC 品质因子（FOM- figure of merit） SAR ADC的设计 Successive Approximation Register (SAR) N-Bit Search DAC Input Voltage Sample-and-Hold (S/H) Amplifier Analog Comparator – * – Advanced Analog IC Design Successive Approximation ADC Professor Y. Chiu ECE 581 Fall 2009 Charge Redistribution SA ADC 4-bit binary-weighted capacitor array DAC Capacitor array samples input when Φ1 is asserted (bottom-pla