基于FPGA的FIR滤波器设计与实现_毕业论文设计.doc

基于FPGA的FIR滤波器设计与实现 目录 引 言 5 第一章 FPGA的设计流程 6 1.1 FPGA概述 6 1.2 FPGA设计流程 8 1.3硬件描述语言HDL(Hardware Description Language) 10 1.4 FPGA开发工具Quartus Ⅱ软件设计流程 11 第二章 有限冲激响应(FIR)滤波器的原理及设计 14 2.1数字信号处理基础原理 14 2.2 FIR滤波器背影知识 17 2.3 FIR数字滤波器原理 18 2.4 利用窗函数法设计FIR滤波器 22 第三章 FIR 数字滤波器的FPGA实现 27 3.1串行FIR滤波器原理 27 3.2分布式算法基础 27 3.3直接型FIR滤波器的原理结构图 30 3.4具有转置结构的FIR滤波器 31 第四章 结论与总结 36 谢 辞 37 参考文献 38 摘要:本论文课题是《基于FPGA的FIR滤波器设计与实现》 。数字滤波器是语音与图象处理、模式识别、雷达信号处理、频谱分析等应用中的一种基本的处理部件，它能满足滤波器对幅度和线性相位的严格要求，避免模拟滤波器所无法克服的电压漂移、温度漂移和噪声等问题。有限冲激响应（FIR）滤波器能在设计任意幅频特性的同时保证严格的线性相位特性。因此在许多应用领域都显示了强大的生命力，具有重要应用意义。本文介绍了用VHDL实现线性相位FIR（有限长单位冲激响应）滤波器。提出了一种基于FPGA的FIR滤波器设计方案。介绍了基于FPGA的FIR滤波器的数字信号处理的算法设计，采用直接型和转置型的基本结构来设计，其运算效率明显提高，并结合先进的EDA软件进行高效的设计和实现，并给出了用Quartus Ⅱ运行的仿真结果。该设计对FPGA硬件资源的利用高效合理，用VHDL编程，在PFGA中实现了高采样率的FIR滤波器。 关键字：FIR滤波器；FPGA；VHDL；MATLAB；Quartus Ⅱ Abstract: Digital filter is a fundamental device used in pronunciation pattern process, pattern-recognition, radar signal process and spectral analysis. It can meet the high needs to range and phase, and can avoid such problems as voltage drifting, temperature drifting and noise that analogue filters cannot overcome. FIR filter can assure a strict linear phase identity while designing any range and frequency. Therefore, FIR filter has shown its strong vitality in many fields and its importance in using. In the paper, the way to use VHDL to design linear phase FIR filter is introduced and its importance in using. In the paper, the way to use VHDL to design linear phase FIR filter is introduced and its designing thoughts are expounded. This paper introduces the design scheme of FIR filter based on FPGA, introduces that the design technology of FIR filter based on FPGA about digital system processing arithmetic. FIR filter adopts the basic structure of direct type, the result are shifting and adding. Integrating advanced software of EDA to design and achieve, and giving some emulator results. This design makes high use of hardware resource about FPGA, programm