【微机原理实验】ISA-baseddataacquisitionandcontrolboard.docVIP

【微机原理实验】ISA-baseddataacquisitionandcontrolboard.doc

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ISA-based data acquisition and control board The hardware is a PC-based data acquisition and control board with many capabilities. It can accept up to 8 analog inputs, produce 2 analog outputs, accept up to 67 digital (switch) inputs and produce 8 digital outputs. It also offers the opportunity for expansion by providing buffered address, data and select lines. In addition, a spare AND gate and two spare NOR gates are made available, along with a small breadboarding area. THE CIRCUIT You will see references to PDF data sheets in the following descriptions. The data sheets might show parts with variations on the part number, but they will have the same functionality. This section will cover parts of the circuit not covered in the experiments. Port addresses on a typical PC Industry Standard Architecture (ISA) bus are derived from the ten address lines A0 through A9, with A9 always high. Note that all buffered lines in the schematics are prefixed with the letter B. Half of IC7, a 74LS244 buffer, is used to buffer the first three address lines and the RESET line. Base address selection is made by three DIP switch sections connected to IC11, a 74LS688 8-bit magnitude comparator: The main logic elements in the 74LS688 are the NXOR gates. Recall from the Boolean Logic section that an XOR gate will produce a high output if the inputs are different. The NXOR does the same thing but inverts the output. The output of one of the NXOR gates above will be low if its outputs are different. If its inputs are the same, its output will be high. Although pairs of inputs go through inverting buffers, the logic is not changed. When all of the NXOR outputs go high along with the enable input on pin 1, the 9-input NAND gate output will go low. When a switch is closed, its input to the 74LS688 is taken low. When the switch is open, the input is pulled up by a resistor in an array. Corresponding inputs to the comparator are connected to address lines A6 through A8. If a switch is op

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